                             Lattice Mapping Report File
    Design:  Top
    Family:  LFCPNX
    Device:  LFCPNX-100
    Package: LFG672
    Performance Grade:  9_High-Performance_1.0V

    Mapper:    version Radiant Software (64-bit) 2023.1.1.200.1
    Mapped on: Wed Nov 29 09:46:01 2023

    Design Information

    Command line:   map -i LAB04_imp1_syn.udb -pdc D:/02_LSCC/09_GSR/Final/LAB02_Pro
         p_Circuit_ARST/source/imp1/Myconstraints.pdc -o LAB04_imp1_map.udb -mp
         LAB04_imp1.mrp -hierrpt -gui

    Design Summary
       Number of registers:        1093 out of 80769 (1%)
          Number of SLICE         registers: 1089 out of 79872 (1%)
          Number of PIO Input     registers:    0 out of   299 (0%)
          Number of PIO Output    registers:    4 out of   299 (1%)
          Number of PIO Tri-State registers:    0 out of   299 (0%)
       Number of LUT4s:            1643 out of 79872 (2%)
          Number used as logic LUT4s:                       1141
          Number used as distributed RAM:                    240 (6 per 16X4 RAM)
          Number used as ripple logic:                       262 (2 per CCU2)
       Number of PIOs used/reserved:   12 out of   299 (4%)
          Number of PIOs reserved:      3 (per sysConfig and/or prohibit constraint)
          Number of PIOs used:          9
            Number of PIOs used for single ended IO:         9
            Number of PIO pairs used for differential IO:    0
            Number allocated to regular speed PIOs:     9 out of  167 (5%)
            Number allocated to high speed PIOs:        0 out of  132 (0%)
       Number of Dedicated IO used for ADC/PCS/PCIE:    0 out of   60 (0%)
       Number of IDDR/ODDR/TDDR functions used:      0 out of   730 (0%)
       Number of IOs using at least one DDR function: 0 (0 differential)
       Number of Block RAMs:          0 out of 208 (0%)
       Number of Large RAMs:          0 out of 7 (0%)
       Number of Logical DSP Functions:
          Number of Pre-Adders (9+9):    0 out of 312 (0%)
          Number of Multipliers (18x18): 0 out of 156 (0%)
             Number of 9X9:        0 (1 18x18 = 2   9x9)
             Number of 18x18:      0 (1 18x18 = 1 18x18)
             Number of 18x36:      0 (2 18x18 = 1 18x36)
             Number of 36x36:      0 (4 18x18 = 1 36x36)
          Number of 54-bit Accumulators: 0 out of 78 (0%)
          Number of 18-bit Registers:    0 out of 312 (0%)
       Number of Physical DSP Components:
          Number of PREADD9:             0 out of 312 (0%)
          Number of MULT9:               0 out of 312 (0%)
          Number of MULT18:              0 out of 156 (0%)
          Number of MULT18X36:           0 out of 78 (0%)
          Number of MULT36:              0 out of 39 (0%)
          Number of ACC54:               0 out of 78 (0%)
          Number of REG18:               0 out of 312 (0%)
       Number of ALUREGs:             0 out of 1 (0%)
       Number of PLLs:                0 out of 4 (0%)
       Number of DDRDLLs:             0 out of 2 (0%)

       Number of DLLDELs:             0 out of 10 (0%)
       Number of DQSs:                0 out of 11 (0%)
       Number of DCSs:                0 out of 2 (0%)
       Number of DCCs:                1 out of 62 (1%)
       Number of PCLKDIVs:            0 out of 2 (0%)
       Number of ECLKDIVs:            0 out of 12 (0%)
       Number of ECLKSYNCs:           0 out of 12 (0%)
       Number of ADC Blocks:          0 out of 1 (0%)
       Number of SGMIICDRs:           0 out of 2 (0%)
       Number of PMUs:                0 out of 1 (0%)
       Number of BNKREF18s:           0 out of 3 (0%)
       Number of BNKREF33s:           0 out of 5 (0%)
       Number of I2CFIFOs:            0 out of 1 (0%)
       Number of Oscillators:         1 out of 1 (100%)
       Number of GSR:                 1 out of 1 (100%)
       Number of Cryptographic Block: 0 out of 1 (0%)
       Number of Config IP:           0 out of 1 (0%)
                     TSALL:           0 out of 1 (0%)
       Number of JTAG:                1 out of 1 (100%)
       Number of SED:                 0 out of 1 (0%)
       Number of PCSs:                0 out of 2 (0%)
       Number of PCIE Link Layers:    0 out of 1 (0%)
       Number of Clocks:  4
          Net jtck: 464 loads, 0 rising, 464 falling (Driver: Pin
         jtaghub_inst.jtagg_u/JTCK)
          Net jtaghub_inst.tck: 1 loads, 1 rising, 0 falling (Driver: Port TCK)
          Net CLK: 575 loads, 575 rising, 0 falling (Driver: Pin
         OSCA001.OSCA_inst/HFCLKOUT)
          Net CLK1: 40 loads, 40 rising, 0 falling (Driver: Pin CE001.DCC01/CLKO)
       Number of Clock Enables:  67
          Net jtaghub_inst.er1_shift_reg8: 23 loads, 23 SLICEs
          Net ip_enable[0]: 37 loads, 37 SLICEs
          Net jtaghub_inst.JUPDATE: 13 loads, 13 SLICEs
          Net secured_signal_142: 11 loads, 11 SLICEs
          Net secured_signal_191: 11 loads, 11 SLICEs
          Net secured_signal_197: 3 loads, 3 SLICEs
          Net secured_signal_198: 5 loads, 5 SLICEs
          Net secured_signal_202: 1 loads, 1 SLICEs
          Net secured_signal_203: 1 loads, 1 SLICEs
          Net secured_signal_227: 65 loads, 65 SLICEs
          Net secured_signal_235: 3 loads, 3 SLICEs
          Net secured_signal_240: 2 loads, 2 SLICEs
          Net secured_signal_243: 5 loads, 5 SLICEs
          Net secured_signal_298: 5 loads, 5 SLICEs
          Net secured_signal_316: 5 loads, 5 SLICEs
          Net secured_signal_1242: 2 loads, 2 SLICEs
          Net secured_signal_1247: 20 loads, 20 SLICEs
          Net secured_signal_1307: 16 loads, 16 SLICEs
          Net secured_signal_1333: 77 loads, 77 SLICEs
          Net secured_signal_1336: 4 loads, 4 SLICEs
          Net secured_signal_1351: 16 loads, 16 SLICEs
          Net secured_signal_1356: 1 loads, 1 SLICEs
          Net secured_signal_1486: 1 loads, 1 SLICEs
          Net secured_signal_1595: 1 loads, 1 SLICEs
          Net secured_signal_1614: 2 loads, 2 SLICEs
          Net secured_signal_1754: 2 loads, 2 SLICEs
          Net secured_signal_1764: 2 loads, 2 SLICEs

          Net secured_signal_1765: 3 loads, 3 SLICEs
          Net secured_signal_1767: 1 loads, 1 SLICEs
          Net secured_signal_1799: 8 loads, 8 SLICEs
          Net secured_signal_1880: 1 loads, 1 SLICEs
          Net secured_signal_1890: 9 loads, 9 SLICEs
          Net secured_signal_1894: 1 loads, 1 SLICEs
          Net secured_signal_1928: 8 loads, 8 SLICEs
          Net secured_signal_1935: 3 loads, 3 SLICEs
          Net secured_signal_1936: 3 loads, 3 SLICEs
          Net secured_signal_1939: 8 loads, 8 SLICEs
          Net secured_signal_1940: 3 loads, 3 SLICEs
          Net secured_signal_1942: 3 loads, 3 SLICEs
          Net secured_signal_1943: 3 loads, 3 SLICEs
          Net secured_signal_1944: 3 loads, 3 SLICEs
          Net secured_signal_1974: 6 loads, 6 SLICEs
          Net secured_signal_1975: 3 loads, 3 SLICEs
          Net secured_signal_1976: 3 loads, 3 SLICEs
          Net secured_signal_2174: 1 loads, 1 SLICEs
          Net secured_signal_2176: 1 loads, 1 SLICEs
          Net secured_signal_2189: 1 loads, 1 SLICEs
          Net secured_signal_2191: 9 loads, 9 SLICEs
          Net secured_signal_2196: 16 loads, 16 SLICEs
          Net secured_signal_2202: 2 loads, 2 SLICEs
          Net secured_signal_2212: 2 loads, 2 SLICEs
          Net secured_signal_2213: 1 loads, 1 SLICEs
          Net secured_signal_2323: 16 loads, 16 SLICEs
          Net secured_signal_2324: 16 loads, 16 SLICEs
          Net secured_signal_2405: 3 loads, 3 SLICEs
          Net secured_signal_2485: 16 loads, 16 SLICEs
          Net secured_signal_2486: 16 loads, 16 SLICEs
          Net secured_signal_2567: 3 loads, 3 SLICEs
          Net secured_signal_2647: 16 loads, 16 SLICEs
          Net secured_signal_2648: 16 loads, 16 SLICEs
          Net secured_signal_2729: 3 loads, 3 SLICEs
          Net secured_signal_2809: 16 loads, 16 SLICEs
          Net secured_signal_2810: 16 loads, 16 SLICEs
          Net secured_signal_2891: 3 loads, 3 SLICEs
          Net secured_signal_2951: 1 loads, 1 SLICEs
          Net secured_signal_2952: 1 loads, 1 SLICEs
          Net secured_signal_2957: 3 loads, 3 SLICEs
       Number of LSRs:  14
          Pin RST_N: 38 loads, 38 SLICEs (Net: RST_N_c)
          Net jrstn: 328 loads, 327 SLICEs
          Net secured_signal_146: 5 loads, 5 SLICEs
          Net secured_signal_333: 17 loads, 17 SLICEs
          Net secured_signal_334: 17 loads, 17 SLICEs
          Net top_reveal_coretop_instance.core0.clear: 1 loads, 1 SLICEs
          Net secured_signal_1749: 1 loads, 1 SLICEs
          Net secured_signal_1819: 3 loads, 3 SLICEs
          Net secured_signal_1833: 1 loads, 1 SLICEs
          Net secured_signal_2003: 2 loads, 2 SLICEs
          Net secured_signal_2004: 2 loads, 2 SLICEs
          Net secured_signal_2183: 5 loads, 5 SLICEs
          Net secured_signal_2277: 1 loads, 1 SLICEs
          Net secured_signal_2278: 1 loads, 1 SLICEs
       Top 10 highest fanout non-clock nets:
          Net jrstn: 329 loads

          Net secured_signal_178: 135 loads
          Net secured_signal_200: 134 loads
          Net secured_signal_179: 134 loads
          Net secured_signal_156: 134 loads
          Net top_reveal_coretop_instance.core0.jshift_d1: 96 loads
          Net top_reveal_coretop_instance.core0.addr[4]: 89 loads
          Net secured_signal_1333: 78 loads
          Net top_reveal_coretop_instance.core0.tr_bit_0: 69 loads
          Net secured_signal_157: 66 loads

       Number of warnings:  4
       Number of errors:    0

       Number of warnings:  4
       Number of errors:    0

    Design Errors/Warnings

    WARNING <1026001> - map: D:/02_LSCC/09_GSR/Final/LAB02_Prop_Circuit_ARST/source/
         imp1/Myconstraints.pdc (20) : No port matched 'GSR_N'.
    WARNING <1027013> - map: No port matched 'GSR_N'.
    WARNING <1014301> - map: Can't resolve object 'GSR_N' in constraint
         'ldc_set_location -site {W21} [get_ports GSR_N]'.
    WARNING <1011001> - map: Remove invalid constraint 'ldc_set_location -site {W21}
         [get_ports GSR_N]'.

    IO (PIO) Attributes

    +---------------------+-----------+-----------+-------+-------+-----------+
    | IO Name             | Direction | Levelmode |  IO   |  IO   | Special   |
    |                     |           |  IO_TYPE  |  REG  |  DDR  | IO Buffer |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | TDI                 | INPUT     |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | TCK                 | INPUT     |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | TMS                 | INPUT     |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | TDO                 | OUTPUT    |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | LED4                | OUTPUT    |           | O     |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | LED3                | OUTPUT    |           | O     |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | LED2                | OUTPUT    |           | O     |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | LED1                | OUTPUT    |           | O     |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+
    | RST_N               | INPUT     |           |       |       |           |
    +---------------------+-----------+-----------+-------+-------+-----------+

    Removed logic

    Block jtaghub_inst/IP_ENABLE_reg[17].ff_inst undriven or does not drive anything

         - clipped.
    Block jtaghub_inst/IP_ENABLE_reg[16].ff_inst undriven or does not drive anything
         - clipped.
    Block jtaghub_inst/IP_ENABLE_reg[15].ff_inst undriven or does not drive anything
         - clipped.
    Block jtaghub_inst/IP_ENABLE_reg[14].ff_inst undriven or does not drive anything
         - clipped.
    Block jtaghub_inst/IP_ENABLE_reg[13].ff_inst undriven or does not drive anything
         - clipped.
    Block jtaghub_inst/IP_ENABLE_reg[12].ff_inst undriven or does not drive anything
         - clipped.
    Block jtaghub_inst/IP_ENABLE_fast_reg[11].ff_inst undriven or does not drive
         anything - clipped.
    Block jtaghub_inst/IP_ENABLE_reg[11].ff_inst undriven or does not drive anything
         - clipped.
    Block jtaghub_inst/IP_ENABLE_fast_reg[3].ff_inst undriven or does not drive
         anything - clipped.
    Block jtaghub_inst/jtdo2_int_m15_N_2L1_cZ undriven or does not drive anything -
         clipped.
    Block VCC_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m15_cZ was optimized away.
    Block jtaghub_inst/IP_ENABLE_0_.CN was optimized away.
    Block jtaghub_inst/OBZ_inst_RNO was optimized away.
    Block jtaghub_inst/jtagg_u_RNI1T52 was optimized away.
    Block RST_N_pad_RNIQNC7 was optimized away.
    Block jtaghub_inst/jtdo2_int_m11_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m11_1_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m8_1_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m11_1_0_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m2_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m2_1_cZ was optimized away.
    Block jtaghub_inst/jtagg_u_RNO_2_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m5_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m5_1_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m2_bm_cZ was optimized away.
    Block jtaghub_inst/jtdo2_int_m5_bm_cZ was optimized away.

    OSC Summary
    -----------

    OSC 1:                                 Pin/Node Value
      OSC Instance Name:                            OSCA001.OSCA_inst
      Enable High Frequency SDSC:          NODE     VCC
      High Frequency Output:               NODE     CLK
      Low Frequency Output:                         NONE
      SDC Output:                                   NONE
      High Frequency DIV:                           2

    ASIC Components
    ---------------

    Instance Name: jtaghub_inst/jtagg_u
             Type: CONFIG_JTAG_CORE
    Instance Name: CE001/DCC01
             Type: DCC
    Instance Name: OSCA001.OSCA_inst
             Type: OSC_CORE

    GSR Usage
    ---------

    GSR Component:
       The Global Set Reset (GSR) resource has been used to implement a global reset
            of the design. The reset signal used for GSR control is
            'top_reveal_coretop_instance.core0.reset_rvl_n'.

    GSR Property:
       The design components with GSR property set to ENABLED will respond to global
            set reset while the components with GSR property set to DISABLED will
            not.

    Components with disabled GSR Property
    -------------------------------------

    These components have the GSR property set to DISABLED. The components will not
         respond to the reset signal 'top_reveal_coretop_instance.core0.reset_rvl_n'
         via the GSR component.

    Type and number of components of the type:
       Register = 513

    Type and instance name of component:
       Register : jtaghub_inst.rom_rd_addr_reg[0].ff_inst
       Register : jtaghub_inst.rom_rd_addr_reg[1].ff_inst
       Register : jtaghub_inst.rom_rd_addr_reg[2].ff_inst
       Register : jtaghub_inst.rom_rd_addr_reg[3].ff_inst
       Register : jtaghub_inst.rom_rd_addr_reg[4].ff_inst
       Register : jtaghub_inst.rom_rd_addr_reg[5].ff_inst
       Register : jtaghub_inst.jshift_d1.ff_inst
       Register : jtaghub_inst.jce1_d1_reg.ff_inst
       Register : jtaghub_inst.id_enable_reg.ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[1].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[2].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[3].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[4].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[5].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[6].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[7].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[8].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[9].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[10].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[11].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[12].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[13].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[14].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[15].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[16].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[17].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[18].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[19].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[20].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[21].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[22].ff_inst
       Register : jtaghub_inst.er1_shift_reg_reg[23].ff_inst
       Register : jtaghub_inst.bit_count_reg[0].ff_inst
       Register : jtaghub_inst.bit_count_reg[1].ff_inst
       Register : jtaghub_inst.bit_count_reg[2].ff_inst
       Register : jtaghub_inst.bit_count_reg[3].ff_inst
       Register : jtaghub_inst.bit_count_reg[4].ff_inst
       Register : jtaghub_inst.IP_ENABLE_reg[0].ff_inst
       Register : jtaghub_inst.IP_ENABLE_reg[1].ff_inst

       Register : jtaghub_inst.IP_ENABLE_reg[2].ff_inst
       Register : jtaghub_inst.IP_ENABLE_reg[3].ff_inst
       Register : jtaghub_inst.IP_ENABLE_reg[4].ff_inst
       Register : jtaghub_inst.IP_ENABLE_reg[5].ff_inst
       Register : jtaghub_inst.IP_ENABLE_reg[6].ff_inst
       Register : jtaghub_inst.IP_ENABLE_reg[7].ff_inst
       Register : jtaghub_inst.IP_ENABLE_fast_reg[8].ff_inst
       Register : jtaghub_inst.IP_ENABLE_reg[8].ff_inst
       Register : jtaghub_inst.IP_ENABLE_reg[9].ff_inst
       Register : jtaghub_inst.IP_ENABLE_reg[10].ff_inst
       Register : secured_comp_291
       Register : secured_comp_292
       Register : secured_comp_295
       Register : secured_comp_297
       Register : secured_comp_298
       Register : secured_comp_300
       Register : secured_comp_303
       Register : secured_comp_304
       Register : secured_comp_306
       Register : secured_comp_308
       Register : secured_comp_310
       Register : secured_comp_312
       Register : secured_comp_314
       Register : secured_comp_317
       Register : secured_comp_318
       Register : secured_comp_320
       Register : secured_comp_322
       Register : secured_comp_324
       Register : secured_comp_326
       Register : secured_comp_328
       Register : secured_comp_330
       Register : secured_comp_332
       Register : secured_comp_335
       Register : secured_comp_337
       Register : secured_comp_339
       Register : secured_comp_340
       Register : secured_comp_342
       Register : secured_comp_345
       Register : secured_comp_346
       Register : secured_comp_348
       Register : secured_comp_350
       Register : secured_comp_352
       Register : secured_comp_355
       Register : secured_comp_356
       Register : secured_comp_358
       Register : secured_comp_360
       Register : secured_comp_363
       Register : secured_comp_364
       Register : secured_comp_366
       Register : secured_comp_369
       Register : secured_comp_370
       Register : secured_comp_372
       Register : secured_comp_374
       Register : secured_comp_376
       Register : secured_comp_379
       Register : secured_comp_380
       Register : secured_comp_383

       Register : secured_comp_385
       Register : secured_comp_387
       Register : secured_comp_388
       Register : secured_comp_390
       Register : secured_comp_392
       Register : secured_comp_395
       Register : secured_comp_396
       Register : secured_comp_399
       Register : secured_comp_400
       Register : secured_comp_403
       Register : secured_comp_404
       Register : secured_comp_406
       Register : secured_comp_408
       Register : secured_comp_410
       Register : secured_comp_412
       Register : secured_comp_414
       Register : secured_comp_417
       Register : secured_comp_418
       Register : secured_comp_530
       Register : secured_comp_531
       Register : secured_comp_532
       Register : secured_comp_533
       Register : secured_comp_534
       Register : secured_comp_535
       Register : secured_comp_536
       Register : secured_comp_537
       Register : secured_comp_538
       Register : secured_comp_539
       Register : secured_comp_540
       Register : secured_comp_541
       Register : secured_comp_542
       Register : secured_comp_543
       Register : secured_comp_544
       Register : secured_comp_545
       Register : secured_comp_546
       Register : secured_comp_547
       Register : secured_comp_548
       Register : secured_comp_549
       Register : secured_comp_550
       Register : secured_comp_551
       Register : secured_comp_552
       Register : secured_comp_553
       Register : secured_comp_554
       Register : secured_comp_555
       Register : secured_comp_556
       Register : secured_comp_557
       Register : secured_comp_558
       Register : secured_comp_559
       Register : secured_comp_560
       Register : secured_comp_561
       Register : secured_comp_562
       Register : secured_comp_563
       Register : secured_comp_564
       Register : secured_comp_565
       Register : secured_comp_566
       Register : secured_comp_567
       Register : secured_comp_568

       Register : secured_comp_569
       Register : secured_comp_570
       Register : secured_comp_571
       Register : secured_comp_572
       Register : secured_comp_573
       Register : secured_comp_574
       Register : secured_comp_575
       Register : secured_comp_576
       Register : secured_comp_577
       Register : secured_comp_578
       Register : secured_comp_579
       Register : secured_comp_580
       Register : secured_comp_581
       Register : secured_comp_582
       Register : secured_comp_583
       Register : secured_comp_584
       Register : secured_comp_585
       Register : secured_comp_586
       Register : secured_comp_587
       Register : secured_comp_588
       Register : secured_comp_589
       Register : secured_comp_590
       Register : secured_comp_591
       Register : secured_comp_592
       Register : secured_comp_593
       Register : secured_comp_594
       Register : secured_comp_660
       Register : secured_comp_661
       Register : secured_comp_662
       Register : secured_comp_663
       Register : secured_comp_664
       Register : secured_comp_665
       Register : secured_comp_666
       Register : secured_comp_667
       Register : secured_comp_1040
       Register : secured_comp_1041
       Register : secured_comp_1042
       Register : secured_comp_1043
       Register : secured_comp_1044
       Register : secured_comp_1045
       Register : secured_comp_1046
       Register : secured_comp_1047
       Register : secured_comp_1048
       Register : secured_comp_1049
       Register : secured_comp_1050
       Register : secured_comp_1051
       Register : secured_comp_1052
       Register : secured_comp_1053
       Register : secured_comp_1054
       Register : secured_comp_1055
       Register : secured_comp_1056
       Register : secured_comp_1057
       Register : secured_comp_1058
       Register : secured_comp_1059
       Register : secured_comp_1060
       Register : secured_comp_1061
       Register : secured_comp_1062

       Register : secured_comp_1063
       Register : secured_comp_1064
       Register : secured_comp_1065
       Register : secured_comp_1066
       Register : secured_comp_1067
       Register : secured_comp_1068
       Register : secured_comp_1069
       Register : secured_comp_1070
       Register : secured_comp_1071
       Register : secured_comp_1072
       Register : secured_comp_1073
       Register : secured_comp_1074
       Register : secured_comp_1075
       Register : secured_comp_1076
       Register : secured_comp_1077
       Register : secured_comp_1078
       Register : secured_comp_1079
       Register : secured_comp_1080
       Register : secured_comp_1081
       Register : secured_comp_1082
       Register : secured_comp_1083
       Register : secured_comp_1084
       Register : secured_comp_1085
       Register : secured_comp_1086
       Register : secured_comp_1087
       Register : secured_comp_1088
       Register : secured_comp_1089
       Register : secured_comp_1090
       Register : secured_comp_1091
       Register : secured_comp_1092
       Register : secured_comp_1093
       Register : secured_comp_1094
       Register : secured_comp_1095
       Register : secured_comp_1096
       Register : secured_comp_1097
       Register : secured_comp_1098
       Register : secured_comp_1099
       Register : secured_comp_1100
       Register : secured_comp_1101
       Register : secured_comp_1102
       Register : secured_comp_1103
       Register : secured_comp_1104
       Register : secured_comp_1105
       Register : secured_comp_1106
       Register : secured_comp_1107
       Register : secured_comp_1108
       Register : secured_comp_1109
       Register : secured_comp_1110
       Register : secured_comp_1111
       Register : secured_comp_1112
       Register : secured_comp_1113
       Register : secured_comp_1114
       Register : secured_comp_1115
       Register : secured_comp_1116
       Register : secured_comp_1117
       Register : secured_comp_1118
       Register : secured_comp_1119

       Register : secured_comp_1120
       Register : secured_comp_1121
       Register : secured_comp_1122
       Register : secured_comp_1123
       Register : secured_comp_1124
       Register : secured_comp_1125
       Register : secured_comp_1126
       Register : secured_comp_1127
       Register : secured_comp_1128
       Register : secured_comp_1129
       Register : secured_comp_1130
       Register : secured_comp_1131
       Register : secured_comp_1132
       Register : secured_comp_1133
       Register : secured_comp_1134
       Register : secured_comp_1135
       Register : secured_comp_1136
       Register : secured_comp_1137
       Register : secured_comp_1138
       Register : secured_comp_1139
       Register : secured_comp_1140
       Register : secured_comp_1141
       Register : secured_comp_1142
       Register : secured_comp_1143
       Register : secured_comp_1144
       Register : secured_comp_1145
       Register : secured_comp_1146
       Register : secured_comp_1147
       Register : secured_comp_1148
       Register : secured_comp_1149
       Register : secured_comp_1150
       Register : secured_comp_1151
       Register : secured_comp_1152
       Register : secured_comp_1153
       Register : secured_comp_1154
       Register : secured_comp_1155
       Register : secured_comp_1156
       Register : secured_comp_1157
       Register : secured_comp_1158
       Register : secured_comp_1159
       Register : secured_comp_1160
       Register : secured_comp_1161
       Register : secured_comp_1162
       Register : secured_comp_1163
       Register : secured_comp_1164
       Register : secured_comp_1165
       Register : secured_comp_1166
       Register : secured_comp_1167
       Register : secured_comp_1168
       Register : secured_comp_1169
       Register : secured_comp_1170
       Register : secured_comp_1171
       Register : secured_comp_1172
       Register : secured_comp_1173
       Register : secured_comp_1174
       Register : secured_comp_1175
       Register : secured_comp_1176

       Register : secured_comp_1177
       Register : secured_comp_1178
       Register : secured_comp_1179
       Register : secured_comp_1180
       Register : secured_comp_1181
       Register : secured_comp_1182
       Register : secured_comp_1183
       Register : secured_comp_1184
       Register : secured_comp_1185
       Register : secured_comp_1186
       Register : secured_comp_1187
       Register : secured_comp_1188
       Register : secured_comp_1189
       Register : secured_comp_1190
       Register : secured_comp_1191
       Register : secured_comp_1192
       Register : secured_comp_1193
       Register : secured_comp_1194
       Register : secured_comp_1195
       Register : secured_comp_1196
       Register : secured_comp_1201
       Register : secured_comp_1202
       Register : secured_comp_1203
       Register : secured_comp_1204
       Register : secured_comp_1205
       Register : secured_comp_1206
       Register : secured_comp_1207
       Register : secured_comp_1208
       Register : secured_comp_1209
       Register : secured_comp_1210
       Register : secured_comp_1211
       Register : secured_comp_1212
       Register : secured_comp_1217
       Register : secured_comp_1218
       Register : secured_comp_1219
       Register : secured_comp_1220
       Register : secured_comp_1221
       Register : secured_comp_1222
       Register : secured_comp_1223
       Register : secured_comp_1224
       Register : secured_comp_1225
       Register : secured_comp_1226
       Register : secured_comp_1227
       Register : secured_comp_1228
       Register : secured_comp_1229
       Register : secured_comp_1421
       Register : secured_comp_1422
       Register : secured_comp_1423
       Register : secured_comp_1424
       Register : secured_comp_1425
       Register : secured_comp_1426
       Register : secured_comp_1427
       Register : secured_comp_1428
       Register : secured_comp_1492
       Register : secured_comp_1493
       Register : secured_comp_1494
       Register : secured_comp_1495

       Register : secured_comp_1496
       Register : secured_comp_1497
       Register : secured_comp_1498
       Register : secured_comp_1499
       Register : secured_comp_1500
       Register : secured_comp_1501
       Register : secured_comp_1505
       Register : secured_comp_1506
       Register : secured_comp_1507
       Register : secured_comp_1508
       Register : secured_comp_1509
       Register : secured_comp_1510
       Register : secured_comp_1511
       Register : secured_comp_1512
       Register : secured_comp_1513
       Register : secured_comp_1514
       Register : secured_comp_1515
       Register : secured_comp_1516
       Register : secured_comp_1517
       Register : secured_comp_1518
       Register : secured_comp_1519
       Register : secured_comp_1520
       Register : secured_comp_1551
       Register : secured_comp_1657
       Register : secured_comp_1658
       Register : secured_comp_1663
       Register : secured_comp_1664
       Register : secured_comp_1665
       Register : secured_comp_1666
       Register : secured_comp_1670
       Register : secured_comp_1671
       Register : secured_comp_1672
       Register : secured_comp_1673
       Register : secured_comp_1674
       Register : secured_comp_1675
       Register : secured_comp_1676
       Register : secured_comp_1677
       Register : secured_comp_1678
       Register : secured_comp_1679
       Register : secured_comp_1680
       Register : secured_comp_1681
       Register : secured_comp_1682
       Register : secured_comp_1683
       Register : secured_comp_1684
       Register : secured_comp_1685
       Register : secured_comp_1686
       Register : secured_comp_1687
       Register : secured_comp_1688
       Register : secured_comp_1689
       Register : secured_comp_1690
       Register : secured_comp_1691
       Register : secured_comp_1692
       Register : secured_comp_1693
       Register : secured_comp_1694
       Register : secured_comp_1695
       Register : secured_comp_1696
       Register : secured_comp_1697

       Register : secured_comp_1698
       Register : secured_comp_1699
       Register : secured_comp_1700
       Register : secured_comp_1701
       Register : secured_comp_1712
       Register : CE001.CE1_reg.ff_inst
       Register : CE001.CE_reg.ff_inst
       Register : CNT01.Couti[0].ff_inst
       Register : CNT01.Couti[1].ff_inst
       Register : CNT01.Couti[2].ff_inst
       Register : CNT01.Couti[3].ff_inst
       Register : CNT01.Couti[4].ff_inst
       Register : CNT01.Couti[5].ff_inst
       Register : CNT01.Couti[6].ff_inst
       Register : CNT01.Couti[7].ff_inst
       Register : CNT01.Couti[8].ff_inst
       Register : CNT01.Couti[9].ff_inst
       Register : CNT01.Couti[10].ff_inst
       Register : CNT01.Couti[11].ff_inst
       Register : CNT01.Couti[12].ff_inst
       Register : CNT01.Couti[13].ff_inst
       Register : CNT01.Couti[14].ff_inst
       Register : CNT01.Couti[15].ff_inst
       Register : CNT02.Couti[0].ff_inst
       Register : CNT02.Couti[1].ff_inst
       Register : CNT02.Couti[2].ff_inst
       Register : CNT02.Couti[3].ff_inst
       Register : CNT02.Couti[4].ff_inst
       Register : CNT02.Couti[5].ff_inst
       Register : CNT02.Couti[6].ff_inst
       Register : CNT02.Couti[7].ff_inst
       Register : CNT02.Couti[8].ff_inst
       Register : CNT02.Couti[9].ff_inst
       Register : CNT02.Couti[10].ff_inst
       Register : CNT02.Couti[11].ff_inst
       Register : CNT02.Couti[12].ff_inst
       Register : CNT02.Couti[13].ff_inst
       Register : CNT02.Couti[14].ff_inst
       Register : CNT02.Couti[15].ff_inst
       Register : CNT03.Couti[0].ff_inst
       Register : CNT03.Couti[1].ff_inst
       Register : CNT03.Couti[2].ff_inst
       Register : CNT03.Couti[3].ff_inst
       Register : CNT03.Couti[4].ff_inst
       Register : CNT03.Couti[5].ff_inst
       Register : CNT03.Couti[6].ff_inst
       Register : CNT03.Couti[7].ff_inst
       Register : CNT03.Couti[8].ff_inst
       Register : CNT03.Couti[9].ff_inst
       Register : CNT03.Couti[10].ff_inst
       Register : CNT03.Couti[11].ff_inst
       Register : CNT03.Couti[12].ff_inst
       Register : CNT03.Couti[13].ff_inst
       Register : CNT03.Couti[14].ff_inst
       Register : CNT03.Couti[15].ff_inst
       Register : CNT04.Couti[0].ff_inst
       Register : CNT04.Couti[1].ff_inst

       Register : CNT04.Couti[2].ff_inst
       Register : CNT04.Couti[3].ff_inst
       Register : CNT04.Couti[4].ff_inst
       Register : CNT04.Couti[5].ff_inst
       Register : CNT04.Couti[6].ff_inst
       Register : CNT04.Couti[7].ff_inst
       Register : CNT04.Couti[8].ff_inst
       Register : CNT04.Couti[9].ff_inst
       Register : CNT04.Couti[10].ff_inst
       Register : CNT04.Couti[11].ff_inst
       Register : CNT04.Couti[12].ff_inst
       Register : CNT04.Couti[13].ff_inst
       Register : CNT04.Couti[14].ff_inst
       Register : CNT04.Couti[15].ff_inst
       Register : LED4_0io.PIC_inst
       Register : LED3_0io.PIC_inst
       Register : LED2_0io.PIC_inst
       Register : LED1_0io.PIC_inst

    Components with synchronous local reset also reset by asynchronous GSR
    ----------------------------------------------------------------------

    These components have the GSR property set to ENABLED and the local reset is
         synchronous. The components will respond to the synchronous local reset and
         to the unrelated asynchronous reset signal
         'top_reveal_coretop_instance.core0.reset_rvl_n' via the GSR component.

    Type and number of components of the type:
       Register = 580

    Type and instance name of component:
       Register : secured_comp_290
       Register : secured_comp_293
       Register : secured_comp_294
       Register : secured_comp_296
       Register : secured_comp_299
       Register : secured_comp_301
       Register : secured_comp_302
       Register : secured_comp_305
       Register : secured_comp_307
       Register : secured_comp_309
       Register : secured_comp_311
       Register : secured_comp_313
       Register : secured_comp_315
       Register : secured_comp_316
       Register : secured_comp_319
       Register : secured_comp_321
       Register : secured_comp_323
       Register : secured_comp_325
       Register : secured_comp_327
       Register : secured_comp_329
       Register : secured_comp_331
       Register : secured_comp_333
       Register : secured_comp_334
       Register : secured_comp_336
       Register : secured_comp_338
       Register : secured_comp_341
       Register : secured_comp_343
       Register : secured_comp_344
       Register : secured_comp_347
       Register : secured_comp_349

       Register : secured_comp_351
       Register : secured_comp_353
       Register : secured_comp_354
       Register : secured_comp_357
       Register : secured_comp_359
       Register : secured_comp_361
       Register : secured_comp_362
       Register : secured_comp_365
       Register : secured_comp_367
       Register : secured_comp_368
       Register : secured_comp_371
       Register : secured_comp_373
       Register : secured_comp_375
       Register : secured_comp_377
       Register : secured_comp_378
       Register : secured_comp_381
       Register : secured_comp_382
       Register : secured_comp_384
       Register : secured_comp_386
       Register : secured_comp_389
       Register : secured_comp_391
       Register : secured_comp_393
       Register : secured_comp_394
       Register : secured_comp_397
       Register : secured_comp_398
       Register : secured_comp_401
       Register : secured_comp_402
       Register : secured_comp_405
       Register : secured_comp_407
       Register : secured_comp_409
       Register : secured_comp_411
       Register : secured_comp_413
       Register : secured_comp_415
       Register : secured_comp_416
       Register : secured_comp_419
       Register : secured_comp_520
       Register : secured_comp_521
       Register : secured_comp_522
       Register : secured_comp_523
       Register : secured_comp_524
       Register : secured_comp_525
       Register : secured_comp_526
       Register : secured_comp_527
       Register : secured_comp_528
       Register : secured_comp_529
       Register : secured_comp_595
       Register : secured_comp_596
       Register : secured_comp_597
       Register : secured_comp_598
       Register : secured_comp_599
       Register : secured_comp_600
       Register : secured_comp_601
       Register : secured_comp_602
       Register : secured_comp_603
       Register : secured_comp_604
       Register : secured_comp_605
       Register : secured_comp_606

       Register : secured_comp_607
       Register : secured_comp_608
       Register : secured_comp_609
       Register : secured_comp_610
       Register : secured_comp_611
       Register : secured_comp_612
       Register : secured_comp_613
       Register : secured_comp_614
       Register : secured_comp_615
       Register : secured_comp_616
       Register : secured_comp_617
       Register : secured_comp_618
       Register : secured_comp_619
       Register : secured_comp_620
       Register : secured_comp_621
       Register : secured_comp_622
       Register : secured_comp_623
       Register : secured_comp_624
       Register : secured_comp_625
       Register : secured_comp_626
       Register : secured_comp_627
       Register : secured_comp_628
       Register : secured_comp_629
       Register : secured_comp_630
       Register : secured_comp_631
       Register : secured_comp_632
       Register : secured_comp_633
       Register : secured_comp_634
       Register : secured_comp_635
       Register : secured_comp_636
       Register : secured_comp_637
       Register : secured_comp_638
       Register : secured_comp_639
       Register : secured_comp_640
       Register : secured_comp_641
       Register : secured_comp_642
       Register : secured_comp_643
       Register : secured_comp_644
       Register : secured_comp_645
       Register : secured_comp_646
       Register : secured_comp_647
       Register : secured_comp_648
       Register : secured_comp_649
       Register : secured_comp_650
       Register : secured_comp_651
       Register : secured_comp_652
       Register : secured_comp_653
       Register : secured_comp_654
       Register : secured_comp_655
       Register : secured_comp_656
       Register : secured_comp_657
       Register : secured_comp_658
       Register : secured_comp_659
       Register : secured_comp_668
       Register : secured_comp_669
       Register : secured_comp_670
       Register : secured_comp_671

       Register : secured_comp_672
       Register : secured_comp_673
       Register : secured_comp_674
       Register : secured_comp_675
       Register : secured_comp_676
       Register : secured_comp_677
       Register : secured_comp_678
       Register : secured_comp_679
       Register : secured_comp_680
       Register : secured_comp_681
       Register : secured_comp_682
       Register : secured_comp_683
       Register : secured_comp_684
       Register : secured_comp_685
       Register : secured_comp_686
       Register : secured_comp_687
       Register : secured_comp_688
       Register : secured_comp_689
       Register : secured_comp_690
       Register : secured_comp_691
       Register : secured_comp_692
       Register : secured_comp_693
       Register : secured_comp_694
       Register : secured_comp_695
       Register : secured_comp_696
       Register : secured_comp_697
       Register : secured_comp_698
       Register : secured_comp_699
       Register : secured_comp_700
       Register : secured_comp_701
       Register : secured_comp_702
       Register : secured_comp_703
       Register : secured_comp_704
       Register : secured_comp_705
       Register : secured_comp_706
       Register : secured_comp_707
       Register : secured_comp_708
       Register : secured_comp_709
       Register : secured_comp_710
       Register : secured_comp_711
       Register : secured_comp_712
       Register : secured_comp_713
       Register : secured_comp_714
       Register : secured_comp_715
       Register : secured_comp_716
       Register : secured_comp_717
       Register : secured_comp_718
       Register : secured_comp_719
       Register : secured_comp_720
       Register : secured_comp_1197
       Register : secured_comp_1198
       Register : secured_comp_1199
       Register : secured_comp_1200
       Register : secured_comp_1213
       Register : secured_comp_1214
       Register : secured_comp_1215
       Register : secured_comp_1216

       Register : secured_comp_1271
       Register : secured_comp_1272
       Register : secured_comp_1273
       Register : secured_comp_1274
       Register : secured_comp_1275
       Register : secured_comp_1276
       Register : secured_comp_1277
       Register : secured_comp_1278
       Register : secured_comp_1279
       Register : secured_comp_1280
       Register : secured_comp_1281
       Register : secured_comp_1282
       Register : secured_comp_1283
       Register : secured_comp_1502
       Register : secured_comp_1503
       Register : secured_comp_1504
       Register : secured_comp_1521
       Register : secured_comp_1522
       Register : secured_comp_1523
       Register : secured_comp_1524
       Register : secured_comp_1525
       Register : secured_comp_1526
       Register : secured_comp_1527
       Register : secured_comp_1528
       Register : secured_comp_1529
       Register : secured_comp_1530
       Register : secured_comp_1531
       Register : secured_comp_1532
       Register : secured_comp_1533
       Register : secured_comp_1534
       Register : secured_comp_1535
       Register : secured_comp_1536
       Register : secured_comp_1537
       Register : secured_comp_1538
       Register : secured_comp_1539
       Register : secured_comp_1540
       Register : secured_comp_1541
       Register : secured_comp_1542
       Register : secured_comp_1543
       Register : secured_comp_1544
       Register : secured_comp_1545
       Register : secured_comp_1546
       Register : secured_comp_1547
       Register : secured_comp_1548
       Register : secured_comp_1549
       Register : secured_comp_1550
       Register : secured_comp_1552
       Register : secured_comp_1553
       Register : secured_comp_1554
       Register : secured_comp_1555
       Register : secured_comp_1556
       Register : secured_comp_1557
       Register : secured_comp_1558
       Register : secured_comp_1559
       Register : secured_comp_1560
       Register : secured_comp_1561
       Register : secured_comp_1562

       Register : secured_comp_1563
       Register : secured_comp_1564
       Register : secured_comp_1565
       Register : secured_comp_1566
       Register : secured_comp_1567
       Register : secured_comp_1568
       Register : secured_comp_1569
       Register : secured_comp_1570
       Register : secured_comp_1571
       Register : secured_comp_1572
       Register : secured_comp_1573
       Register : secured_comp_1574
       Register : secured_comp_1575
       Register : secured_comp_1576
       Register : secured_comp_1577
       Register : secured_comp_1578
       Register : secured_comp_1579
       Register : secured_comp_1580
       Register : secured_comp_1581
       Register : secured_comp_1582
       Register : secured_comp_1583
       Register : secured_comp_1584
       Register : secured_comp_1585
       Register : secured_comp_1586
       Register : secured_comp_1667
       Register : secured_comp_1668
       Register : secured_comp_1669
       Register : secured_comp_1702
       Register : secured_comp_1703
       Register : secured_comp_1704
       Register : secured_comp_1705
       Register : secured_comp_1706
       Register : secured_comp_1707
       Register : secured_comp_1708
       Register : secured_comp_1709
       Register : secured_comp_1710
       Register : secured_comp_1711
       Register : secured_comp_1713
       Register : secured_comp_1714
       Register : secured_comp_1715
       Register : secured_comp_1716
       Register : secured_comp_1717
       Register : secured_comp_1812
       Register : secured_comp_1813
       Register : secured_comp_1814
       Register : secured_comp_1815
       Register : secured_comp_1816
       Register : secured_comp_1817
       Register : secured_comp_1818
       Register : secured_comp_1819
       Register : secured_comp_1820
       Register : secured_comp_1821
       Register : secured_comp_1822
       Register : secured_comp_1823
       Register : secured_comp_1824
       Register : secured_comp_1825
       Register : secured_comp_1826

       Register : secured_comp_1827
       Register : secured_comp_1828
       Register : secured_comp_1829
       Register : secured_comp_1830
       Register : secured_comp_1831
       Register : secured_comp_1832
       Register : secured_comp_1833
       Register : secured_comp_1834
       Register : secured_comp_1835
       Register : secured_comp_1836
       Register : secured_comp_1837
       Register : secured_comp_1838
       Register : secured_comp_1839
       Register : secured_comp_1840
       Register : secured_comp_1841
       Register : secured_comp_1842
       Register : secured_comp_1843
       Register : secured_comp_1844
       Register : secured_comp_1845
       Register : secured_comp_1846
       Register : secured_comp_1847
       Register : secured_comp_1848
       Register : secured_comp_1849
       Register : secured_comp_1850
       Register : secured_comp_1851
       Register : secured_comp_1852
       Register : secured_comp_1853
       Register : secured_comp_1854
       Register : secured_comp_1855
       Register : secured_comp_1856
       Register : secured_comp_1857
       Register : secured_comp_1858
       Register : secured_comp_1859
       Register : secured_comp_1860
       Register : secured_comp_1861
       Register : secured_comp_1862
       Register : secured_comp_1863
       Register : secured_comp_1864
       Register : secured_comp_1865
       Register : secured_comp_1866
       Register : secured_comp_1867
       Register : secured_comp_1868
       Register : secured_comp_1869
       Register : secured_comp_1870
       Register : secured_comp_1871
       Register : secured_comp_1872
       Register : secured_comp_1873
       Register : secured_comp_1874
       Register : secured_comp_1875
       Register : secured_comp_1876
       Register : secured_comp_1877
       Register : secured_comp_1878
       Register : secured_comp_1879
       Register : secured_comp_1974
       Register : secured_comp_1975
       Register : secured_comp_1976
       Register : secured_comp_1977

       Register : secured_comp_1978
       Register : secured_comp_1979
       Register : secured_comp_1980
       Register : secured_comp_1981
       Register : secured_comp_1982
       Register : secured_comp_1983
       Register : secured_comp_1984
       Register : secured_comp_1985
       Register : secured_comp_1986
       Register : secured_comp_1987
       Register : secured_comp_1988
       Register : secured_comp_1989
       Register : secured_comp_1990
       Register : secured_comp_1991
       Register : secured_comp_1992
       Register : secured_comp_1993
       Register : secured_comp_1994
       Register : secured_comp_1995
       Register : secured_comp_1996
       Register : secured_comp_1997
       Register : secured_comp_1998
       Register : secured_comp_1999
       Register : secured_comp_2000
       Register : secured_comp_2001
       Register : secured_comp_2002
       Register : secured_comp_2003
       Register : secured_comp_2004
       Register : secured_comp_2005
       Register : secured_comp_2006
       Register : secured_comp_2007
       Register : secured_comp_2008
       Register : secured_comp_2009
       Register : secured_comp_2010
       Register : secured_comp_2011
       Register : secured_comp_2012
       Register : secured_comp_2013
       Register : secured_comp_2014
       Register : secured_comp_2015
       Register : secured_comp_2016
       Register : secured_comp_2017
       Register : secured_comp_2018
       Register : secured_comp_2019
       Register : secured_comp_2020
       Register : secured_comp_2021
       Register : secured_comp_2022
       Register : secured_comp_2023
       Register : secured_comp_2024
       Register : secured_comp_2025
       Register : secured_comp_2026
       Register : secured_comp_2027
       Register : secured_comp_2028
       Register : secured_comp_2029
       Register : secured_comp_2030
       Register : secured_comp_2031
       Register : secured_comp_2032
       Register : secured_comp_2033
       Register : secured_comp_2034

       Register : secured_comp_2035
       Register : secured_comp_2036
       Register : secured_comp_2037
       Register : secured_comp_2038
       Register : secured_comp_2039
       Register : secured_comp_2040
       Register : secured_comp_2041
       Register : secured_comp_2136
       Register : secured_comp_2137
       Register : secured_comp_2138
       Register : secured_comp_2139
       Register : secured_comp_2140
       Register : secured_comp_2141
       Register : secured_comp_2142
       Register : secured_comp_2143
       Register : secured_comp_2144
       Register : secured_comp_2145
       Register : secured_comp_2146
       Register : secured_comp_2147
       Register : secured_comp_2148
       Register : secured_comp_2149
       Register : secured_comp_2150
       Register : secured_comp_2151
       Register : secured_comp_2152
       Register : secured_comp_2153
       Register : secured_comp_2154
       Register : secured_comp_2155
       Register : secured_comp_2156
       Register : secured_comp_2157
       Register : secured_comp_2158
       Register : secured_comp_2159
       Register : secured_comp_2160
       Register : secured_comp_2161
       Register : secured_comp_2162
       Register : secured_comp_2163
       Register : secured_comp_2164
       Register : secured_comp_2165
       Register : secured_comp_2166
       Register : secured_comp_2167
       Register : secured_comp_2168
       Register : secured_comp_2169
       Register : secured_comp_2170
       Register : secured_comp_2171
       Register : secured_comp_2172
       Register : secured_comp_2173
       Register : secured_comp_2174
       Register : secured_comp_2175
       Register : secured_comp_2176
       Register : secured_comp_2177
       Register : secured_comp_2178
       Register : secured_comp_2179
       Register : secured_comp_2180
       Register : secured_comp_2181
       Register : secured_comp_2182
       Register : secured_comp_2183
       Register : secured_comp_2184
       Register : secured_comp_2185

       Register : secured_comp_2186
       Register : secured_comp_2187
       Register : secured_comp_2188
       Register : secured_comp_2189
       Register : secured_comp_2190
       Register : secured_comp_2191
       Register : secured_comp_2192
       Register : secured_comp_2193
       Register : secured_comp_2194
       Register : secured_comp_2195
       Register : secured_comp_2196
       Register : secured_comp_2197
       Register : secured_comp_2198
       Register : secured_comp_2199
       Register : secured_comp_2200
       Register : secured_comp_2201
       Register : secured_comp_2202
       Register : secured_comp_2203
       Register : secured_comp_2298
       Register : secured_comp_2299
       Register : secured_comp_2300
       Register : secured_comp_2301
       Register : secured_comp_2302
       Register : secured_comp_2303
       Register : secured_comp_2304
       Register : secured_comp_2305
       Register : secured_comp_2306
       Register : secured_comp_2307
       Register : secured_comp_2308
       Register : secured_comp_2309
       Register : secured_comp_2310
       Register : secured_comp_2311
       Register : secured_comp_2312
       Register : secured_comp_2313
       Register : secured_comp_2314
       Register : secured_comp_2315
       Register : secured_comp_2316
       Register : secured_comp_2317
       Register : secured_comp_2318
       Register : secured_comp_2319
       Register : secured_comp_2320
       Register : secured_comp_2321
       Register : secured_comp_2322
       Register : secured_comp_2323
       Register : secured_comp_2324
       Register : secured_comp_2325
       Register : secured_comp_2326
       Register : secured_comp_2327
       Register : secured_comp_2328
       Register : secured_comp_2329
       Register : secured_comp_2330
       Register : secured_comp_2331
       Register : secured_comp_2332
       Register : secured_comp_2333
       Register : secured_comp_2334
       Register : secured_comp_2335
       Register : secured_comp_2336

       Register : secured_comp_2337
       Register : secured_comp_2338
       Register : secured_comp_2339
       Register : secured_comp_2340
       Register : secured_comp_2341
       Register : secured_comp_2342
       Register : secured_comp_2343
       Register : secured_comp_2344
       Register : secured_comp_2345
       Register : secured_comp_2346
       Register : secured_comp_2347
       Register : secured_comp_2348
       Register : secured_comp_2349
       Register : secured_comp_2350
       Register : secured_comp_2351
       Register : secured_comp_2352
       Register : secured_comp_2353
       Register : secured_comp_2354
       Register : secured_comp_2355
       Register : secured_comp_2356
       Register : secured_comp_2357
       Register : secured_comp_2358
       Register : secured_comp_2359
       Register : secured_comp_2360
       Register : secured_comp_2361
       Register : secured_comp_2362
       Register : secured_comp_2363
       Register : secured_comp_2364
       Register : secured_comp_2365
       Register : secured_comp_2383
       Register : secured_comp_2384
       Register : secured_comp_2385
       Register : secured_comp_2386
       Register : secured_comp_2387
       Register : secured_comp_2388
       Register : secured_comp_2389
       Register : secured_comp_2390

    Constraint Summary
    ------------------

       Total number of constraints: 17
       Total number of constraints dropped: 1

    Run Time and Memory Usage
    -------------------------

       Total CPU Time: 2 secs
       Total REAL Time: 5 secs
       Peak Memory Usage: 609 MB

    Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
    Copyright (c) 1995
         AT&T Corp.   All rights reserved.
    Copyright (c) 1995-2001 Lucent
         Technologies Inc.  All rights reserved.
    Copyright (c) 2001 Agere Systems
         All rights reserved.
    Copyright (c) 2002-2023 Lattice Semiconductor
         Corporation,  All rights reserved.